Serial Bit Reverser

Bits arrive serially on input din, one bit per clock cycle, as a continuous stream with no gaps. Every group of 8 consecutive bits must be sent out on dout, one bit per cycle, in reverse order: the last bit of each group comes out first. Design the circuit with as little storage as possible.

Now K independent streams arrive in parallel. All of them are aligned to the same 8-bit group boundaries. Extend your design to handle all K streams, and explain how to reduce area and power compared with K separate copies of the circuit from part 1.